CROCETTI, LUCA Statistiche

CROCETTI, LUCA  

DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE  

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A PUF-Based Secure Boot for RISC-V Architectures 1-gen-2024 DI MATTEO, Stefano; Zulberti, Luca; Cosimo Lapenna, Federico; Nannipieri, Pietro; Crocetti, Luca; Fanucci, Luca; Saponara, Sergio
A Scalable and Configurable Architecture for Hardware Authenticated Encryption Modules Compliant with the CCSDS Security Specifications 1-gen-2024 Crocetti, Luca; Fanucci, Luca; Baldanzi, Luca; Falaschi, Francesco
Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative 1-gen-2024 Nannipieri, Pietro; DI MATTEO, Stefano; Crocetti, Luca; Zulberti, Luca; Fanucci, Luca; Saponara, Sergio
Highly-Efficient Galois Counter Mode Symmetric Encryption Core for the Space Data Link Security Protocol 1-gen-2024 Crocetti, Luca; Falaschi, Francesco; Saponara, Sergio; Fanucci, Luca
On the Usage of Isomorphic Fields in Hardware AES Modules for Optimizing the Efficiency 1-gen-2024 Crocetti, Luca; Saponara, Sergio
Scalable Hardware-Efficient Architecture for Frame Synchronization in High-Data-Rate Satellite Receivers 1-gen-2024 Crocetti, Luca; Pagani, Emanuele; Bertolucci, Matteo; Fanucci, Luca
Secure Data Authentication in Space Communications by High-efficient AES-CMAC Core in Space-Grade FPGA 1-gen-2024 Crocetti, Luca; Falaschi, Francesco; Saponara, Sergio; Fanucci, Luca
A Novel and Robust Security Approach for Authentication, Integrity, and Confidentiality of Lithium-ion Battery Management Systems 1-gen-2023 Crocetti, Luca; Di Rienzo, Roberto; Verani, Alessandro; Baronti, Federico; Roncella, Roberto; Saletti, Roberto
Can the SHA-3 Algorithm be used for the Construction of Efficient and Robust Hardware Cryptographic Random Number Generators? 1-gen-2023 Crocetti, Luca
Design Methodology and Metrics for Robust and Highly Qualified Security Modules in Trusted Environments 1-gen-2023 Crocetti, Luca; Nannipieri, Pietro; Di Matteo, Stefano; Saponara, Sergio
Hardware Design of an Advanced-Feature Cryptographic Tile within the European Processor Initiative 1-gen-2023 Nannipieri, Pietro; Crocetti, Luca; Di Matteo, Stefano; Fanucci, Luca; Saponara, Sergio
Implementation of a Hash-based Secure Core for Integrity and Authentication of Data in Space Applications on Space-grade FPGAs 1-gen-2023 Crocetti, Luca; Falaschi, Francesco; Saponara, Sergio; Fanucci, Luca
Implementation Strategies for Highly-accurate and Efficient Frame Synchronization Modules in Satellite Communication Receivers 1-gen-2023 Crocetti, Luca; Pagani, Emanuele; Bertolucci, Matteo; Fanucci, Luca
On the Necessity, Security Requirements and Performance Requirements of Digital Signature Co-processors in Li-ion BMSs 1-gen-2023 Crocetti, Luca; Montemaggi, Lorenzo; DI RIENZO, Roberto; Baronti, Federico; Roncella, Roberto; Saletti, Roberto
Review of Methodologies and Metrics for Assessing the Quality of Random Number Generators 1-gen-2023 Crocetti, L; Nannipieri, P; Di Matteo, S; Fanucci, L; Saponara, S
CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes 1-gen-2022 Nannipieri, P.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S.
Design and Test of an Integrated Random Number Generator with All-Digital Entropy Source 1-gen-2022 Crocetti, L.; Di Matteo, S.; Nannipieri, P.; Fanucci, L.; Saponara, S.
VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative 1-gen-2022 Nannipieri, P.; Matteo, S. D.; Baldanzi, L.; Crocetti, L.; Zulberti, L.; Saponara, S.; Fanucci, L.
Secure elliptic curve crypto-processor for real-time iot applications 1-gen-2021 Di Matteo, S.; Baldanzi, L.; Crocetti, L.; Nannipieri, P.; Fanucci, L.; Saponara, S.
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative 1-gen-2021 Nannipieri, P.; Bertolucci, M.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S.