Path (min) delay faults and their impact on self-checking circuits' operation
2006-01-01 Metra, C.; Omana, M.; Rossi, D.; Cazeaux, J. M.; Mak, T. M.
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies
2012-01-01 Bolchini, C.; Miele, A.; Sandionigi, C.; Ottavi, M.; Pontarelli, S.; Salsano, A.; Metra, C.; Omana, M.; Rossi, D.; Reorda, M. S.; Sterpone, L.; Violante, M.; Gerardin, S.; Bagatin, M.; Paccagnella, A.
Novel low-cost aging sensor
2010-01-01 Omana, M.; Rossi, D.; Bosio, N.; Metra, C.
Error correcting code analysis for cache memory high reliability and performance
2011-01-01 Rossi, D.; Timoncini, N.; Spica, M.; Metra, C.
Secure communication protocol for wireless sensor networks
2010-01-01 Rossi, D.; Omana, M.; Giaffreda, D.; Metra, C.
Self-checking monitor for NBTI due degradation
2010-01-01 Omana, M.; Rossi, D.; Bosio, N.; Metra, C.
Configurable error control scheme for NoC signal integrity
2007-01-01 Rossi, D.; Angelini, P.; Metra, C.
Fast and low-cost clock deskew buffer
2004-01-01 Omana, M.; Rossi, D.; Metra, C.
Novel approach to reduce power droop during scan-based logic BIST
2013-01-01 Omana, M.; Rossi, D.; Fuzzi, F.; Metra, C.; Tirumurti, C.; Galivache, R.
Low power probabilistic online monitoring of systematic erroneous behaviour
2017-01-01 Gutierrez, M. D.; Tenentes, V.; Kazmierski, T. J.; Rossi, D.
Low cost error monitoring for improved maintainability of IoT applications
2017-01-01 Gutierrez, M. D.; Tenentes, V.; Kazmierski, T. J.; Rossi, D.
BTI and leakage aware dynamic voltage scaling for reliable low power cache memories
2015-01-01 Rossi, D.; Tenentes, V.; Khursheed, S.; Al-Hashimi, B. M.
Collective-Aware System-on-Chips for Dependable IoT Applications
2018-01-01 Tenentes, V.; Rossi, D.; Al-Hashimi, B. M.
Analysis of BTI aging of level shifters
2016-01-01 Cai, J.; Halak, B.; Rossi, D.
BTI aware thermal management for reliable DVFS designs
2016-01-01 Chahal, H.; Tenentes, V.; Rossi, D.; Al-Hashimi, B. M.
On transistor level gate sizing for increased robustness to transient faults
2005-01-01 Cazeaux, J. M.; Rossi, D.; Omana, M.; Metra, C.; Chatterjee, A.
Coding techniques for low switching noise in fault tolerant busses
2005-01-01 Nieuwland, A. K.; Katoch, A.; Rossi, D.; Metra, C.
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects
2006-01-01 Omana, M.; Cazeaux, J. M.; Rossi, D.; Metra, C.
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors
2010-01-01 Rossi, D.; Omana, M. E.; Berghella, G.; Metra, C.; Jas, A.; Tirumurti, C.; Galivanche, R.
Multiple transient faults in logic: An issue for next generation ICs?
2005-01-01 Rossi, D.; Omana, M.; Toma, F.; Metra, C.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Path (min) delay faults and their impact on self-checking circuits' operation | 1-gen-2006 | Metra, C.; Omana, M.; Rossi, D.; Cazeaux, J. M.; Mak, T. M. | |
| High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies | 1-gen-2012 | Bolchini, C.; Miele, A.; Sandionigi, C.; Ottavi, M.; Pontarelli, S.; Salsano, A.; Metra, C.; Omana, M.; Rossi, D.; Reorda, M. S.; Sterpone, L.; Violante, M.; Gerardin, S.; Bagatin, M.; Paccagnella, A. | |
| Novel low-cost aging sensor | 1-gen-2010 | Omana, M.; Rossi, D.; Bosio, N.; Metra, C. | |
| Error correcting code analysis for cache memory high reliability and performance | 1-gen-2011 | Rossi, D.; Timoncini, N.; Spica, M.; Metra, C. | |
| Secure communication protocol for wireless sensor networks | 1-gen-2010 | Rossi, D.; Omana, M.; Giaffreda, D.; Metra, C. | |
| Self-checking monitor for NBTI due degradation | 1-gen-2010 | Omana, M.; Rossi, D.; Bosio, N.; Metra, C. | |
| Configurable error control scheme for NoC signal integrity | 1-gen-2007 | Rossi, D.; Angelini, P.; Metra, C. | |
| Fast and low-cost clock deskew buffer | 1-gen-2004 | Omana, M.; Rossi, D.; Metra, C. | |
| Novel approach to reduce power droop during scan-based logic BIST | 1-gen-2013 | Omana, M.; Rossi, D.; Fuzzi, F.; Metra, C.; Tirumurti, C.; Galivache, R. | |
| Low power probabilistic online monitoring of systematic erroneous behaviour | 1-gen-2017 | Gutierrez, M. D.; Tenentes, V.; Kazmierski, T. J.; Rossi, D. | |
| Low cost error monitoring for improved maintainability of IoT applications | 1-gen-2017 | Gutierrez, M. D.; Tenentes, V.; Kazmierski, T. J.; Rossi, D. | |
| BTI and leakage aware dynamic voltage scaling for reliable low power cache memories | 1-gen-2015 | Rossi, D.; Tenentes, V.; Khursheed, S.; Al-Hashimi, B. M. | |
| Collective-Aware System-on-Chips for Dependable IoT Applications | 1-gen-2018 | Tenentes, V.; Rossi, D.; Al-Hashimi, B. M. | |
| Analysis of BTI aging of level shifters | 1-gen-2016 | Cai, J.; Halak, B.; Rossi, D. | |
| BTI aware thermal management for reliable DVFS designs | 1-gen-2016 | Chahal, H.; Tenentes, V.; Rossi, D.; Al-Hashimi, B. M. | |
| On transistor level gate sizing for increased robustness to transient faults | 1-gen-2005 | Cazeaux, J. M.; Rossi, D.; Omana, M.; Metra, C.; Chatterjee, A. | |
| Coding techniques for low switching noise in fault tolerant busses | 1-gen-2005 | Nieuwland, A. K.; Katoch, A.; Rossi, D.; Metra, C. | |
| Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects | 1-gen-2006 | Omana, M.; Cazeaux, J. M.; Rossi, D.; Metra, C. | |
| Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors | 1-gen-2010 | Rossi, D.; Omana, M. E.; Berghella, G.; Metra, C.; Jas, A.; Tirumurti, C.; Galivanche, R. | |
| Multiple transient faults in logic: An issue for next generation ICs? | 1-gen-2005 | Rossi, D.; Omana, M.; Toma, F.; Metra, C. |
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