CINECA IRIS Institutional Research Information System

DI MATTEO, STEFANO
 Distribuzione geografica
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Continente #
AS - Asia 763
NA - Nord America 704
EU - Europa 631
SA - Sud America 114
AF - Africa 36
OC - Oceania 3
Totale 2.251
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Nazione #
US - Stati Uniti d'America 685
IT - Italia 320
SG - Singapore 280
CN - Cina 200
BR - Brasile 94
HK - Hong Kong 80
SE - Svezia 68
DE - Germania 58
FR - Francia 52
TR - Turchia 35
KR - Corea 33
GB - Regno Unito 31
VN - Vietnam 29
IN - India 24
FI - Finlandia 20
NL - Olanda 14
CI - Costa d'Avorio 13
JP - Giappone 11
UA - Ucraina 11
ES - Italia 10
IQ - Iraq 10
SN - Senegal 10
AR - Argentina 8
GR - Grecia 8
TW - Taiwan 8
CA - Canada 7
AT - Austria 6
BG - Bulgaria 6
CY - Cipro 6
RU - Federazione Russa 6
CO - Colombia 5
MX - Messico 5
MY - Malesia 5
PK - Pakistan 5
UZ - Uzbekistan 5
ZA - Sudafrica 5
BD - Bangladesh 4
CZ - Repubblica Ceca 4
KZ - Kazakistan 4
MA - Marocco 4
AU - Australia 3
IL - Israele 3
PL - Polonia 3
PT - Portogallo 3
SA - Arabia Saudita 3
AE - Emirati Arabi Uniti 2
AZ - Azerbaigian 2
EC - Ecuador 2
IE - Irlanda 2
IR - Iran 2
JM - Giamaica 2
KG - Kirghizistan 2
LT - Lituania 2
PE - Perù 2
AL - Albania 1
AM - Armenia 1
BH - Bahrain 1
BO - Bolivia 1
DO - Repubblica Dominicana 1
DZ - Algeria 1
EG - Egitto 1
GH - Ghana 1
GP - Guadalupe 1
GY - Guiana 1
HR - Croazia 1
HU - Ungheria 1
ID - Indonesia 1
IS - Islanda 1
LA - Repubblica Popolare Democratica del Laos 1
LB - Libano 1
LU - Lussemburgo 1
NP - Nepal 1
OM - Oman 1
PA - Panama 1
PH - Filippine 1
PR - Porto Rico 1
RO - Romania 1
RS - Serbia 1
RW - Ruanda 1
SY - Repubblica araba siriana 1
TH - Thailandia 1
TT - Trinidad e Tobago 1
VE - Venezuela 1
Totale 2.251
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Città #
Singapore 175
Pisa 108
Santa Clara 106
Dallas 93
Ashburn 92
Hong Kong 78
Shanghai 52
Hefei 43
Chandler 41
Boardman 38
Los Angeles 35
Seoul 32
Beijing 31
Florence 24
Istanbul 24
New York 24
Milan 22
Empoli 21
Frankfurt am Main 20
Lucca 20
Munich 20
Fairfield 14
Abidjan 13
Ho Chi Minh City 13
Grenoble 11
Buffalo 10
Dakar 10
São Paulo 10
Lawrence 9
Livorno 9
Princeton 9
Turku 9
Cascina 8
Fuzhou 8
Ogden 8
Serra 8
Rosignano Solvay 7
Wilmington 7
Houston 6
Lappeenranta 6
Limassol 6
Rome 6
Sofia 6
Tokyo 6
Woodbridge 6
Athens 5
Atlanta 5
Baghdad 5
Chicago 5
Council Bluffs 5
Helsinki 5
La Spezia 5
London 5
San Diego 5
Seyssinet-Pariset 5
Taipei 5
Tashkent 5
Amsterdam 4
Baltimore 4
Bengaluru 4
Capannori 4
Chennai 4
Delhi 4
Düsseldorf 4
Medford 4
Modena 4
Montreal 4
Nuremberg 4
Palermo 4
Redondo Beach 4
Seattle 4
Shenzhen 4
Soacha 4
Belfast 3
Belo Horizonte 3
Bourg-la-Reine 3
Brno 3
Bruino 3
Cambourne 3
Charlotte 3
Curitiba 3
Denver 3
Duque de Caxias 3
Eskişehir 3
Hackney 3
Hanoi 3
Johannesburg 3
Kuala Lumpur 3
Les Ulis 3
Marseille 3
Meppel 3
Naples 3
Nara 3
Poplar 3
Quanzhou 3
Rio de Janeiro 3
Viareggio 3
Vienna 3
Wuhan 3
Adapazarı 2
Totale 1.508
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Nome #
Crypto accelerators for power-efficient and realtime on-chip implementation of secure algorithms 173
VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative 148
A PUF-Based Secure Boot for RISC-V Architectures 137
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative 124
CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes 119
Design and Test of an Integrated Random Number Generator with All-Digital Entropy Source 118
True random number generator based on Fibonacci-Galois ring oscillators for FPGA 117
Design and Evaluation of a Peripheral for Integrity Checking to Improve RAS in RISC-V Architectures 113
Secure elliptic curve crypto-processor for real-time iot applications 111
A RISC-V Post Quantum Cryptography Instruction Set Extension for Number Theoretic Transform to Speed-Up CRYSTALS Algorithms 108
Review of Methodologies and Metrics for Assessing the Quality of Random Number Generators 106
Design Methodology and Metrics for Robust and Highly Qualified Security Modules in Trusted Environments 104
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative 102
HW-SW Interface Design and Implementation for Error Logging and Reporting for RAS Improvement 96
Hardware Design of an Advanced-Feature Cryptographic Tile within the European Processor Initiative 95
Innovative Plug-and-Play System for Electrification of Wheel-Chairs 94
Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative 94
On hardware acceleration of quantum-resistant FOTA systems in automotive 87
A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design: Performance Evaluation on ECC Accelerator Use-Case 84
Dispositivo di motorizzazione per sedia a rotelle 72
VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library 62
RTL Flow for the Power Side-Channel Resilience Assessment of a Post-quantum SHA-3 Accelerator 59
TYRCA: A RISC-V Tightly-Coupled Accelerator for Code-Based Cryptography 9
Accelerating First-Order Secure ML-KEM with Masked SHA-3: Cost, Randomness, and Security Evaluation 8
Design and~Implementation on~{FPGA} of~a~{HW} Accelerator for~Post-Quantum {RLWE} Polynomial Operations 7
Totale 2.347
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Categoria #
all - tutte 7.349
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 7.349
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/202123 0 0 0 0 0 3 0 2 2 11 1 4
2021/202285 0 0 2 2 5 8 8 1 5 15 22 17
2022/2023262 48 26 19 15 21 18 5 15 61 1 20 13
2023/2024309 12 16 37 19 25 35 45 44 19 4 28 25
2024/20251.021 24 28 38 78 91 101 74 35 119 71 118 244
2025/2026599 81 124 132 75 152 35 0 0 0 0 0 0
Totale 2.347