CINECA IRIS Institutional Research Information System

NANNIPIERI, PIETRO
 Distribuzione geografica
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Continente #
NA - Nord America 3.606
AS - Asia 2.721
EU - Europa 2.352
SA - Sud America 360
AF - Africa 152
OC - Oceania 5
Totale 9.196
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Nazione #
US - Stati Uniti d'America 3.516
IT - Italia 944
SG - Singapore 939
CN - Cina 674
SE - Svezia 473
HK - Hong Kong 398
BR - Brasile 278
VN - Vietnam 213
DE - Germania 170
FR - Francia 156
GB - Regno Unito 149
BG - Bulgaria 101
JP - Giappone 86
FI - Finlandia 76
TR - Turchia 76
IN - India 71
KR - Corea 68
CI - Costa d'Avorio 63
RU - Federazione Russa 55
CA - Canada 48
UA - Ucraina 38
ES - Italia 36
SN - Senegal 36
NL - Olanda 35
MX - Messico 29
CH - Svizzera 28
AR - Argentina 26
IQ - Iraq 25
PL - Polonia 21
TW - Taiwan 20
MY - Malesia 18
BD - Bangladesh 17
GR - Grecia 16
PK - Pakistan 16
UZ - Uzbekistan 16
EG - Egitto 15
AT - Austria 14
ZA - Sudafrica 13
CO - Colombia 12
EC - Ecuador 12
ID - Indonesia 11
MA - Marocco 11
VE - Venezuela 9
IL - Israele 8
AE - Emirati Arabi Uniti 7
CL - Cile 7
CY - Cipro 7
IE - Irlanda 7
BO - Bolivia 6
CZ - Repubblica Ceca 6
NP - Nepal 6
AZ - Azerbaigian 5
IR - Iran 5
KZ - Kazakistan 5
LT - Lituania 5
SA - Arabia Saudita 5
BH - Bahrain 4
DZ - Algeria 4
ET - Etiopia 4
PH - Filippine 4
PY - Paraguay 4
RO - Romania 4
AL - Albania 3
AU - Australia 3
DO - Repubblica Dominicana 3
PE - Perù 3
TH - Thailandia 3
AM - Armenia 2
BA - Bosnia-Erzegovina 2
BE - Belgio 2
DK - Danimarca 2
EE - Estonia 2
KE - Kenya 2
LB - Libano 2
OM - Oman 2
PA - Panama 2
SK - Slovacchia (Repubblica Slovacca) 2
TT - Trinidad e Tobago 2
UY - Uruguay 2
AO - Angola 1
AW - Aruba 1
BS - Bahamas 1
GH - Ghana 1
GY - Guiana 1
HN - Honduras 1
HR - Croazia 1
HU - Ungheria 1
JM - Giamaica 1
JO - Giordania 1
KG - Kirghizistan 1
KW - Kuwait 1
LA - Repubblica Popolare Democratica del Laos 1
LK - Sri Lanka 1
LU - Lussemburgo 1
MD - Moldavia 1
MZ - Mozambico 1
NI - Nicaragua 1
NZ - Nuova Zelanda 1
PT - Portogallo 1
QA - Qatar 1
Totale 9.191
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Città #
Singapore 514
Hong Kong 395
Ashburn 369
Santa Clara 334
San Jose 277
Fairfield 181
Dallas 164
Woodbridge 154
Chandler 151
Shanghai 146
Milan 141
Beijing 119
Houston 107
New York 103
Pisa 101
Sofia 100
Los Angeles 99
Serra 95
Florence 94
Chicago 92
Boardman 83
Cambridge 69
Ho Chi Minh City 69
Wilmington 69
Seattle 67
Frankfurt am Main 66
Hefei 66
Abidjan 63
Council Bluffs 62
Tokyo 62
Seoul 52
Munich 51
Princeton 49
Ann Arbor 48
Hanoi 46
London 43
Lawrence 40
Dakar 36
Helsinki 36
Marseille 33
Orem 30
Lauterbourg 29
Istanbul 28
Las Vegas 26
Rome 26
São Paulo 26
Medford 23
Buffalo 22
Turku 22
Zurich 21
Dearborn 19
Fuzhou 19
Izmir 19
Lucca 19
Redwood City 19
Düsseldorf 18
Empoli 17
Atlanta 16
Denver 16
Montreal 16
Redondo Beach 16
Cascina 14
Conversano 14
Nuremberg 14
Ogden 14
Ottawa 14
Tamworth 14
Chennai 12
Comiso 12
Madrid 12
Paris 12
Phoenix 12
Belo Horizonte 11
Cairo 11
Charlotte 11
Genoa 11
Memphis 11
San Diego 11
Tashkent 11
Baghdad 10
Dong Ket 10
Kocaeli 10
Poplar 10
San Francisco 10
Taipei 10
Viareggio 10
Des Moines 9
Rio de Janeiro 9
Vienna 9
Warsaw 9
Boca Raton 8
Brooklyn 8
Johannesburg 8
Nanjing 8
Naples 8
Baltimore 7
Basingstoke 7
Campinas 7
Guangzhou 7
Lappeenranta 7
Totale 5.695
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Nome #
The U-PHOS experience within the ESA student REXUS/BEXUS programme: A real space hands-on opportunity 392
U-PHOS Project: Development of a Large Diameter Pulsating Heat Pipe Experiment on board REXUS 22 360
U-PHOS Project: Experimental Results of A Large Diameter Pulsating Heat Pipe on Board Rexus 22 293
U-PHOS EXPERIMENT: THERMAL RESPONSE OF A LARGE DIAMETER PULSATING HEAT PIPE ON BOARD REXUS 22 ROCKET 286
Start-up of a large diameter Pulsating Heat Pipe on ground and on board a sounding rocket 271
VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative 203
A PXI based implementation of a TLK2711 equivalent interface 199
Pulsating Heat pipe only for Space (PHOS): Results of the REXUS 18 sounding rocket campaign 187
Application of FBG sensors to temperature measurement on board of the REXUS 22 sounding rocket in the framework of the U-PHOS project 182
A PUF-Based Secure Boot for RISC-V Architectures 176
A complete EGSE solution for the spacewire and spacefibre protocol based on the pxi industry standard 174
Large Diameter Pulsating Heat Pipes On Board The Esa Rexus 18 Sounding Rocket 171
True random number generator based on Fibonacci-Galois ring oscillators for FPGA 167
Design of a SpaceFibre High-Speed Satellite Interface ASIC 165
A RISC-V Post Quantum Cryptography Instruction Set Extension for Number Theoretic Transform to Speed-Up CRYSTALS Algorithms 163
PHOS EXPERIMENT: THERMAL RESPONSE OF A LARGE DIAMETER PULSATING HEAT PIPE ON BOARD REXUS 18 ROCKET 161
Upgraded Pulsating Heat Pipe Only For Space (U-Phos): Results of the 22nd Rexus Sounding Rocket Campaign 160
Clustering Algorithm for a Spaceborne Lightning Imager: Design, Trade-Off, and FPGA Implementation 157
Review of Methodologies and Metrics for Assessing the Quality of Random Number Generators 151
Phos Experiment: implementation and test of a Large Diameter Pulsating Heat Pipe On Board Rexus 18 Rocket 147
Integration of a SpaceFibre IP Core with the LEON3 Microprocessor Through an AMBA AHB Bus 147
Design and Test of an Integrated Random Number Generator with All-Digital Entropy Source 147
A SpaceFibre multi lane codec System on a Chip: Enabling technology for low cost satellite EGSE 146
CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes 145
AXI4LV: Design and Implementation of a Full-Speed AMBA AXI4-Burst DMA Interface for LabVIEW FPGA 144
A configurable hardware word re-ordering block for multi-lane communication protocols: Design and use case 143
Design of a reduced SpaceFibre interface: An enabling technology for low-cost spacecraft high-speed data-handling 143
A serial high-speed satellite communication CODEC: Design and implementation of a SpaceFibre interface 143
VHDL design of a spacefibre routing switch 142
Thermal Response of a Pulsating Heat Pipe on Board the Rexus 18 Sounding Rocket: PHOS Experiment Chronicles 141
Secure elliptic curve crypto-processor for real-time iot applications 136
A Novel Parallel 8B/10B Encoder: Architecture and Comparison with Classical Solution 134
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative 130
SHINe: Simulator for satellite on-board high-speed networks featuring SpaceFibre and SpaceWire protocols 129
Design Methodology and Metrics for Robust and Highly Qualified Security Modules in Trusted Environments 128
Phos project: Lesson learned from experimenting a pulsating heat pipe on board a sounding rocket (REXUS18) and refurbishment strategies 125
Hardware Design of an Advanced-Feature Cryptographic Tile within the European Processor Initiative 124
Exploiting LabVIEW FPGA Socketed CLIP to Design and Implement Soft-Core Based Complex Digital Architectures on PXI FPGA Target Boards 121
Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative 120
An Investigation on SpaceFibre Protocol Maturity: Interoperability Tests 120
Design of a spacewire/spacefibre EGSE system based on PXI industry standard 120
Fault Detection Exploiting Artificial Intelligence in Satellite Systems 114
The very high-speed SpaceFibre multi-lane CoDec: Implementation and experimental performance evaluation 112
A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design: Performance Evaluation on ECC Accelerator Use-Case 108
SpaceART SpaceWire and SpaceFibre Analyser Real-Time 104
A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design of System-on-Chip exploiting RISC-V Architecture 99
Integration of Twin Models in UVM Verification IPs for Space Telecommunication Systems 98
Design and Implementation of a Configurable Fully Compliant DVB-S2 LDPC Encoder for High Data-Rate Downlink Payload 97
Exploiting FPGA Dynamic Partial Reconfiguration for a Soft GPU-based System-on-Chip 95
SpaceART SpaceWire Sniffer for Link Monitoring: A Complete Communication Analysis in a Time-Constrained Test Scenario 95
ICU4SAT: A General-Purpose Reconfigurable Instrument Control Unit Based on Open Source Components 94
SystemVerilog UVM-based Verification Environment for a SpaceFibre Router 91
Architectural Implications for Inference of Graph Neural Networks on CGRA-based Accelerators 89
SpaceWire/SpaceFibre Analyser Real-Time (SpaceART) system extension to the Wizardlink Protocol 85
Flexible Precision Vector Extension for Energy Efficient Coarse-Grained Reconfigurable Array AI-Engine 82
Design and Implementation of a DVB-S2 Reconfigurable Datapath BCH Encoder for High Data-Rate Payload Data Telemetry 80
Next-Generation High-Speed Satellite Interconnect: Disclosing the SpaceFibre Protocol – A System Perspective 78
Exploring Key Aspects of Soft GPGPU Computing for On-board Acceleration of Artificial Intelligence Algorithms in Space Applications 74
Highly Parameterised CGRA Architecture for Design Space Exploration of Machine Learning Applications Onboard Satellites 72
A representative SpaceFibre network evaluation: Features, performances and future trends 72
Towards the Extension of FPG-AI Toolflow to RNN Deployment on FPGAs for On-board Satellite Applications 68
Inference and Evaluation of Deep Convolutional Neural Networks on Microchip's Hardware Accelerator VectorBlox 64
SmartDMA: Adaptable Memory Access Controller for CGRA-based Processing Systems 64
SpaceWire Codec VIP: An innovative architecture of UVM-based Verification Environment: SpaceWire Test and Verification, Short Paper 58
Satellite High-Speed On-Board Data Handling: From a Wizardlink Equivalent Transceiver To a Full SpaceFibre Interface 52
Eye Diagram Analyser for Space High-Speed Serial Links: A Tool for Evaluating Signal Integrity in SpaceFibre Links 45
Efficient Coarse-Grained Reconfigurable Array architecture for machine learning applications in space using DARE65T library platform 44
FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs 44
SpaceFibre Network Discovery and Configuration Protocol Development 34
CGR-AI Engine: A scalable CGRA-based processing platform for Artificial Intelligence in space applications 33
A Robust and Portable All-Digital TRNG Circuit for Extending the Instruction Set Architecture of RISC-V Processors 32
Hardware Platforms Enabling Edge AI for Space Applications: A Critical Review 32
FPG-AI for On-Board AI Acceleration: A Case Study for Semantic Segmentation of Maritime and Terrestrial Areas 31
Toward Reliable Onboard AI in Space: A Fault-Tolerant Soft GPU-Based System-on-Chip 30
RADSAFiE: A Netlist-Level Fault Injection User Interface Application for FPGA-Based Digital Systems 28
Enabling the Hardware Acceleration of Residual Layers within the FPG-AI Framework for Space Applications 26
Extension to Vector Operations of a Soft GPU Core for Machine Learning Acceleration in Space 22
FPGA Prototype of CGR-AI Engine for Space Systems: Step Towards UDSM Implementation 19
Edge AI Acceleration for Critical Systems: From FPGA Hardware to CGRA Technology 13
Totale 9.471
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Categoria #
all - tutte 27.951
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 27.951
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/202154 0 0 0 0 0 0 0 0 0 0 0 54
2021/2022660 36 11 35 62 119 83 21 14 56 36 68 119
2022/2023884 143 119 62 24 47 73 23 49 222 5 102 15
2023/2024860 53 64 131 51 81 102 61 57 19 51 60 130
2024/20252.395 62 90 83 175 253 233 147 109 240 246 275 482
2025/20263.196 133 326 230 271 294 299 472 213 282 367 178 131
Totale 9.471