CINECA IRIS Institutional Research Information System

NANNIPIERI, PIETRO
 Distribuzione geografica
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Continente #
NA - Nord America 4.169
AS - Asia 2.751
EU - Europa 2.464
SA - Sud America 378
Continente sconosciuto - Info sul continente non disponibili 276
AF - Africa 154
OC - Oceania 5
Totale 10.197
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Nazione #
US - Stati Uniti d'America 4.045
IT - Italia 998
SG - Singapore 943
CN - Cina 681
SE - Svezia 495
HK - Hong Kong 400
BR - Brasile 290
VN - Vietnam 216
DE - Germania 175
FR - Francia 163
GB - Regno Unito 153
BG - Bulgaria 101
JP - Giappone 90
FI - Finlandia 76
TR - Turchia 76
IN - India 74
KR - Corea 68
CA - Canada 63
CI - Costa d'Avorio 63
RU - Federazione Russa 57
ES - Italia 39
NL - Olanda 39
UA - Ucraina 38
SN - Senegal 36
MX - Messico 30
AR - Argentina 28
CH - Svizzera 28
IQ - Iraq 25
PL - Polonia 21
BD - Bangladesh 20
GR - Grecia 20
TW - Taiwan 20
MY - Malesia 19
EG - Egitto 17
PK - Pakistan 16
UZ - Uzbekistan 16
AT - Austria 14
CO - Colombia 13
EC - Ecuador 13
ZA - Sudafrica 13
ID - Indonesia 11
MA - Marocco 11
VE - Venezuela 9
IL - Israele 8
RO - Romania 8
AE - Emirati Arabi Uniti 7
CL - Cile 7
CY - Cipro 7
IE - Irlanda 7
BO - Bolivia 6
CZ - Repubblica Ceca 6
NP - Nepal 6
SA - Arabia Saudita 6
AZ - Azerbaigian 5
IR - Iran 5
JM - Giamaica 5
KZ - Kazakistan 5
LT - Lituania 5
NI - Nicaragua 5
BH - Bahrain 4
DO - Repubblica Dominicana 4
DZ - Algeria 4
EE - Estonia 4
ET - Etiopia 4
PE - Perù 4
PH - Filippine 4
PY - Paraguay 4
TH - Thailandia 4
AL - Albania 3
AU - Australia 3
TT - Trinidad e Tobago 3
UY - Uruguay 3
AM - Armenia 2
BA - Bosnia-Erzegovina 2
BE - Belgio 2
CR - Costa Rica 2
DK - Danimarca 2
HN - Honduras 2
HR - Croazia 2
KE - Kenya 2
LB - Libano 2
OM - Oman 2
PA - Panama 2
PR - Porto Rico 2
SK - Slovacchia (Repubblica Slovacca) 2
AO - Angola 1
AW - Aruba 1
BB - Barbados 1
BS - Bahamas 1
CW - ???statistics.table.value.countryCode.CW??? 1
GE - Georgia 1
GH - Ghana 1
GT - Guatemala 1
GY - Guiana 1
HU - Ungheria 1
JO - Giordania 1
KG - Kirghizistan 1
KW - Kuwait 1
LA - Repubblica Popolare Democratica del Laos 1
LK - Sri Lanka 1
Totale 9.910
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Città #
Singapore 518
Ashburn 474
Hong Kong 397
Santa Clara 339
San Jose 336
Fairfield 181
Dallas 169
Woodbridge 154
Chandler 151
Milan 146
Shanghai 146
Council Bluffs 122
Beijing 121
New York 113
Los Angeles 111
Houston 108
Pisa 106
Sofia 100
Chicago 98
Florence 98
Serra 95
Boardman 84
Frankfurt am Main 71
Ho Chi Minh City 70
Wilmington 70
Cambridge 69
Seattle 69
Hefei 66
Tokyo 64
Abidjan 63
Seoul 52
Munich 51
Princeton 49
Ann Arbor 48
Hanoi 47
London 44
Lawrence 40
Dakar 36
Helsinki 36
Marseille 33
Rome 32
Orem 31
São Paulo 31
Las Vegas 29
Lauterbourg 29
Istanbul 28
Buffalo 25
Medford 23
Turku 22
Zurich 21
Lucca 20
Dearborn 19
Fuzhou 19
Izmir 19
Redwood City 19
Atlanta 18
Düsseldorf 18
Montreal 18
Denver 17
Empoli 17
Phoenix 16
Redondo Beach 16
Cascina 14
Conversano 14
Nuremberg 14
Ogden 14
Ottawa 14
Tamworth 14
Chennai 13
Paris 13
Belo Horizonte 12
Cairo 12
Charlotte 12
Comiso 12
Madrid 12
Memphis 12
San Francisco 12
Genoa 11
San Diego 11
Tashkent 11
Baghdad 10
Dong Ket 10
Kocaeli 10
Philadelphia 10
Poplar 10
Taipei 10
Viareggio 10
Brooklyn 9
Des Moines 9
Rio de Janeiro 9
Vienna 9
Warsaw 9
Baltimore 8
Boca Raton 8
Johannesburg 8
Nanjing 8
Naples 8
Washington 8
Basingstoke 7
Bologna 7
Totale 6.036
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Nome #
The U-PHOS experience within the ESA student REXUS/BEXUS programme: A real space hands-on opportunity 409
U-PHOS Project: Development of a Large Diameter Pulsating Heat Pipe Experiment on board REXUS 22 375
U-PHOS Project: Experimental Results of A Large Diameter Pulsating Heat Pipe on Board Rexus 22 302
U-PHOS EXPERIMENT: THERMAL RESPONSE OF A LARGE DIAMETER PULSATING HEAT PIPE ON BOARD REXUS 22 ROCKET 294
Start-up of a large diameter Pulsating Heat Pipe on ground and on board a sounding rocket 291
VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative 219
A PXI based implementation of a TLK2711 equivalent interface 201
Pulsating Heat pipe only for Space (PHOS): Results of the REXUS 18 sounding rocket campaign 196
Application of FBG sensors to temperature measurement on board of the REXUS 22 sounding rocket in the framework of the U-PHOS project 191
Large Diameter Pulsating Heat Pipes On Board The Esa Rexus 18 Sounding Rocket 189
A RISC-V Post Quantum Cryptography Instruction Set Extension for Number Theoretic Transform to Speed-Up CRYSTALS Algorithms 187
A PUF-Based Secure Boot for RISC-V Architectures 186
A complete EGSE solution for the spacewire and spacefibre protocol based on the pxi industry standard 183
True random number generator based on Fibonacci-Galois ring oscillators for FPGA 182
PHOS EXPERIMENT: THERMAL RESPONSE OF A LARGE DIAMETER PULSATING HEAT PIPE ON BOARD REXUS 18 ROCKET 174
Upgraded Pulsating Heat Pipe Only For Space (U-Phos): Results of the 22nd Rexus Sounding Rocket Campaign 173
Design of a SpaceFibre High-Speed Satellite Interface ASIC 167
A serial high-speed satellite communication CODEC: Design and implementation of a SpaceFibre interface 166
Review of Methodologies and Metrics for Assessing the Quality of Random Number Generators 163
Clustering Algorithm for a Spaceborne Lightning Imager: Design, Trade-Off, and FPGA Implementation 162
Design and Test of an Integrated Random Number Generator with All-Digital Entropy Source 160
Phos Experiment: implementation and test of a Large Diameter Pulsating Heat Pipe On Board Rexus 18 Rocket 153
CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes 152
Integration of a SpaceFibre IP Core with the LEON3 Microprocessor Through an AMBA AHB Bus 150
Thermal Response of a Pulsating Heat Pipe on Board the Rexus 18 Sounding Rocket: PHOS Experiment Chronicles 149
A SpaceFibre multi lane codec System on a Chip: Enabling technology for low cost satellite EGSE 149
Phos project: Lesson learned from experimenting a pulsating heat pipe on board a sounding rocket (REXUS18) and refurbishment strategies 149
A configurable hardware word re-ordering block for multi-lane communication protocols: Design and use case 148
AXI4LV: Design and Implementation of a Full-Speed AMBA AXI4-Burst DMA Interface for LabVIEW FPGA 148
Design of a reduced SpaceFibre interface: An enabling technology for low-cost spacecraft high-speed data-handling 147
VHDL design of a spacefibre routing switch 144
Secure elliptic curve crypto-processor for real-time iot applications 144
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative 141
Design Methodology and Metrics for Robust and Highly Qualified Security Modules in Trusted Environments 140
SHINe: Simulator for satellite on-board high-speed networks featuring SpaceFibre and SpaceWire protocols 140
A Novel Parallel 8B/10B Encoder: Architecture and Comparison with Classical Solution 135
Hardware Design of an Advanced-Feature Cryptographic Tile within the European Processor Initiative 130
Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative 129
An Investigation on SpaceFibre Protocol Maturity: Interoperability Tests 129
Fault Detection Exploiting Artificial Intelligence in Satellite Systems 126
Design of a spacewire/spacefibre EGSE system based on PXI industry standard 124
Exploiting LabVIEW FPGA Socketed CLIP to Design and Implement Soft-Core Based Complex Digital Architectures on PXI FPGA Target Boards 123
A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design: Performance Evaluation on ECC Accelerator Use-Case 119
The very high-speed SpaceFibre multi-lane CoDec: Implementation and experimental performance evaluation 114
Design and Implementation of a Configurable Fully Compliant DVB-S2 LDPC Encoder for High Data-Rate Downlink Payload 107
SpaceART SpaceWire Sniffer for Link Monitoring: A Complete Communication Analysis in a Time-Constrained Test Scenario 106
SpaceART SpaceWire and SpaceFibre Analyser Real-Time 105
A Script-Based Cycle-True Verification Framework to Speed-Up Hardware and Software Co-Design of System-on-Chip exploiting RISC-V Architecture 105
Integration of Twin Models in UVM Verification IPs for Space Telecommunication Systems 104
SystemVerilog UVM-based Verification Environment for a SpaceFibre Router 98
Exploiting FPGA Dynamic Partial Reconfiguration for a Soft GPU-based System-on-Chip 98
ICU4SAT: A General-Purpose Reconfigurable Instrument Control Unit Based on Open Source Components 98
Next-Generation High-Speed Satellite Interconnect: Disclosing the SpaceFibre Protocol – A System Perspective 95
Architectural Implications for Inference of Graph Neural Networks on CGRA-based Accelerators 91
Flexible Precision Vector Extension for Energy Efficient Coarse-Grained Reconfigurable Array AI-Engine 88
SpaceWire/SpaceFibre Analyser Real-Time (SpaceART) system extension to the Wizardlink Protocol 86
Design and Implementation of a DVB-S2 Reconfigurable Datapath BCH Encoder for High Data-Rate Payload Data Telemetry 83
SmartDMA: Adaptable Memory Access Controller for CGRA-based Processing Systems 79
Highly Parameterised CGRA Architecture for Design Space Exploration of Machine Learning Applications Onboard Satellites 78
Exploring Key Aspects of Soft GPGPU Computing for On-board Acceleration of Artificial Intelligence Algorithms in Space Applications 77
Towards the Extension of FPG-AI Toolflow to RNN Deployment on FPGAs for On-board Satellite Applications 75
A representative SpaceFibre network evaluation: Features, performances and future trends 74
Inference and Evaluation of Deep Convolutional Neural Networks on Microchip's Hardware Accelerator VectorBlox 68
SpaceWire Codec VIP: An innovative architecture of UVM-based Verification Environment: SpaceWire Test and Verification, Short Paper 66
Satellite High-Speed On-Board Data Handling: From a Wizardlink Equivalent Transceiver To a Full SpaceFibre Interface 59
Efficient Coarse-Grained Reconfigurable Array architecture for machine learning applications in space using DARE65T library platform 55
Eye Diagram Analyser for Space High-Speed Serial Links: A Tool for Evaluating Signal Integrity in SpaceFibre Links 51
FPG-AI for On-Board AI Acceleration: A Case Study for Semantic Segmentation of Maritime and Terrestrial Areas 50
CGR-AI Engine: A scalable CGRA-based processing platform for Artificial Intelligence in space applications 48
FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs 47
Hardware Platforms Enabling Edge AI for Space Applications: A Critical Review 45
Toward Reliable Onboard AI in Space: A Fault-Tolerant Soft GPU-Based System-on-Chip 44
A Robust and Portable All-Digital TRNG Circuit for Extending the Instruction Set Architecture of RISC-V Processors 43
Edge AI Acceleration for Critical Systems: From FPGA Hardware to CGRA Technology 42
Extension to Vector Operations of a Soft GPU Core for Machine Learning Acceleration in Space 39
SpaceFibre Network Discovery and Configuration Protocol Development 39
RADSAFiE: A Netlist-Level Fault Injection User Interface Application for FPGA-Based Digital Systems 36
Enabling the Hardware Acceleration of Residual Layers within the FPG-AI Framework for Space Applications 33
FPGA Prototype of CGR-AI Engine for Space Systems: Step Towards UDSM Implementation 32
Totale 10.197
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Categoria #
all - tutte 30.909
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 30.909
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022613 0 0 35 62 119 83 21 14 56 36 68 119
2022/2023884 143 119 62 24 47 73 23 49 222 5 102 15
2023/2024860 53 64 131 51 81 102 61 57 19 51 60 130
2024/20252.395 62 90 83 175 253 233 147 109 240 246 275 482
2025/20263.219 133 326 230 271 294 299 472 213 282 367 178 154
2026/2027703 155 251 297 0 0 0 0 0 0 0 0 0
Totale 10.197